/*!
    \file    main.c
    \brief   transfer data from RAM to RAM

    \version 2025-01-24, V1.4.0, firmware for GD32H7xx
*/

/*
    Copyright (c) 2025, GigaDevice Semiconductor Inc.

    Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:

    1. Redistributions of source code must retain the above copyright notice, this
       list of conditions and the following disclaimer.
    2. Redistributions in binary form must reproduce the above copyright notice,
       this list of conditions and the following disclaimer in the documentation
       and/or other materials provided with the distribution.
    3. Neither the name of the copyright holder nor the names of its contributors
       may be used to endorse or promote products derived from this software without
       specific prior written permission.

    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
OF SUCH DAMAGE.
*/

#include "gd32h7xx.h"
#include "gd32h759i_eval.h"
#include <string.h>

#define DATANUM                  32

__IO ErrStatus transferflag1 = ERROR;
__IO ErrStatus transferflag2 = ERROR;
__IO ErrStatus transferflag3 = ERROR;
__IO ErrStatus transferflag4 = ERROR;
__IO ErrStatus test_flag;

__attribute__ ((aligned(32))) uint8_t source_address[DATANUM] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
                                                                 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
                                                                 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
                                                                 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20
                                                                };
__attribute__ ((aligned(32))) uint8_t destination_address1[DATANUM];
__attribute__ ((aligned(32))) uint8_t destination_address2[DATANUM];
__attribute__ ((aligned(32))) uint8_t destination_address3[DATANUM];
__attribute__ ((aligned(32))) uint8_t destination_address4[DATANUM];

void cache_enable(void);
void cache_invalidate(void);
void destbuf_init(void);
void led_config(void);
void dma_config(void);
ErrStatus memory_compare(uint8_t *src, uint8_t *dst, uint16_t length);

/*!
    \brief      main function
    \param[in]  none
    \param[out] none
    \retval     none
*/
int main(void)
{
    /* enable the CPU cache */
    cache_enable();
    /* enable DMA clock */
    rcu_periph_clock_enable(RCU_DMA0);
    /* LEDs configuration */
    led_config();
    /* initialize destination buffer */
    destbuf_init();
    /* clean the CPU cache line */
    SCB_CleanDCache_by_Addr((uint32_t*)source_address, DATANUM);
    /* configure DMA channels */
    dma_config();

    while(RESET == dma_flag_get(DMA0, DMA_CH4, DMA_FLAG_FTF)){
    }
    /* invalidate the cache lines */
    cache_invalidate();
    /* compare the data of source_address with data of destination_address */
    transferflag1 = memory_compare(source_address, destination_address1, DATANUM);
    transferflag2 = memory_compare(source_address, destination_address2, DATANUM);
    transferflag3 = memory_compare(source_address, destination_address3, DATANUM);
    transferflag4 = memory_compare(source_address, destination_address4, DATANUM);
    test_flag = SUCCESS;
    /* if DMA channel 1 transfer success, set test_flag ERROR */
    if(SUCCESS != transferflag1) {
        test_flag = ERROR;
    }
    /* if DMA channel 2 transfer success, set test_flag ERROR */
    if(SUCCESS != transferflag2) {
        test_flag = ERROR;
    }
    /* if DMA channel 3 transfer success, set test_flag ERROR */
    if(SUCCESS != transferflag3) {
        test_flag = ERROR;
    }
    /* if DMA channel 4 transfer success, set test_flag ERROR */
    if(SUCCESS != transferflag4) {
        test_flag = ERROR;
    }

    if(test_flag == SUCCESS) {
        gd_eval_led_on(LED1);
        gd_eval_led_on(LED2);
    }

    while(1) {
    }
}

/*!
    \brief      enable the CPU cache
    \param[in]  none
    \param[out] none
    \retval     none
*/
void cache_enable(void)
{
    /* enable i-cache */
    SCB_EnableICache();

    /* enable d-cache */
    SCB_EnableDCache();
}

/*!
    \brief      invalidate the CPU cache lines
    \param[in]  none
    \param[out] none
    \retval     none
*/
void cache_invalidate(void)
{
    SCB_InvalidateDCache_by_Addr((uint32_t*)destination_address1, DATANUM);
    SCB_InvalidateDCache_by_Addr((uint32_t*)destination_address2, DATANUM);
    SCB_InvalidateDCache_by_Addr((uint32_t*)destination_address3, DATANUM);
    SCB_InvalidateDCache_by_Addr((uint32_t*)destination_address4, DATANUM);
}

/*!
    \brief      initialize destination buffer
    \param[in]  none
    \param[out] none
    \retval     none
*/
void destbuf_init(void)
{
    memset(destination_address1, 0, DATANUM);
    memset(destination_address2, 0, DATANUM);
    memset(destination_address3, 0, DATANUM);
    memset(destination_address4, 0, DATANUM);
}

/*!
    \brief      LEDs configuration
    \param[in]  none
    \param[out] none
    \retval     none
*/
void led_config(void)
{
    gd_eval_led_init(LED1);
    gd_eval_led_init(LED2);

    /* all LEDs off */
    gd_eval_led_off(LED1);
    gd_eval_led_off(LED2);
}

/*!
    \brief      configure different DMA channels
    \param[in]  none
    \param[out] none
    \retval     none
*/
void dma_config(void)
{
    dma_single_data_parameter_struct dma_init_struct;

    /* initialize DMA0 channel 1 */
    dma_deinit(DMA0, DMA_CH1);
    dma_single_data_para_struct_init(&dma_init_struct);

    dma_init_struct.request             = DMA_REQUEST_M2M;
    dma_init_struct.direction           = DMA_MEMORY_TO_MEMORY;
    dma_init_struct.memory0_addr        = (uint32_t)destination_address1;
    dma_init_struct.memory_inc          = DMA_MEMORY_INCREASE_ENABLE;
    dma_init_struct.periph_memory_width = DMA_MEMORY_WIDTH_8BIT;
    dma_init_struct.number              = DATANUM;
    dma_init_struct.periph_addr         = (uint32_t)source_address;
    dma_init_struct.periph_inc          = DMA_PERIPH_INCREASE_ENABLE;
    dma_init_struct.priority            = DMA_PRIORITY_ULTRA_HIGH;
    dma_single_data_mode_init(DMA0, DMA_CH1, &dma_init_struct);
    /* configure DMA mode */
    dma_circulation_disable(DMA0, DMA_CH1);

    /* initialize DMA0 channel 2 */
    dma_deinit(DMA0, DMA_CH2);
    dma_init_struct.memory0_addr        = (uint32_t)destination_address2;
    dma_single_data_mode_init(DMA0, DMA_CH2, &dma_init_struct);
    /* configure DMA mode */
    dma_circulation_disable(DMA0, DMA_CH2);

    /* initialize DMA0 channel 3 */
    dma_deinit(DMA0, DMA_CH3);
    dma_init_struct.memory0_addr        = (uint32_t)destination_address3;
    dma_single_data_mode_init(DMA0, DMA_CH3, &dma_init_struct);
    /* configure DMA mode */
    dma_circulation_disable(DMA0, DMA_CH3);

    /* initialize DMA0 channel 4 */
    dma_deinit(DMA0, DMA_CH4);
    dma_init_struct.memory0_addr        = (uint32_t)destination_address4;
    dma_single_data_mode_init(DMA0, DMA_CH4, &dma_init_struct);
    /* configure DMA mode */
    dma_circulation_disable(DMA0, DMA_CH4);

    /* enable DMA0 channel 1 ~ channel 4 */
    dma_channel_enable(DMA0, DMA_CH1);
    dma_channel_enable(DMA0, DMA_CH2);
    dma_channel_enable(DMA0, DMA_CH3);
    dma_channel_enable(DMA0, DMA_CH4);
}

/*!
    \brief      memory compare function
    \param[in]  src: source data
    \param[in]  dst: destination data
    \param[in]  length: the compare data length
    \param[out] none
    \retval     ErrStatus: ERROR or SUCCESS
*/
ErrStatus memory_compare(uint8_t *src, uint8_t *dst, uint16_t length)
{
    while(length--) {
        if(*src++ != *dst++) {
            return ERROR;
        }
    }
    return SUCCESS;
}
